I am not allowed to put online my solutions to the Nand2Tetris exercises. So what I'm going to do instead is to give some hints on how to solve them.

Here are the hints for the Chapter 1 Exercises:

**1. Not gate**- look at the Nand truth table; notice the output when both a and b are the same

**2. And gate**- use your newly created

**Not**gate (and the

**Nand**gate of course)

**3. Or gate**- we can use the idea from the Canonical Representation presented on page 9. But instead of focusing on the 1 outputs of the

*Or function*, let's focus instead on the 0 output.

The

*Or function*has only one

*0*output.

This means that we can be able to create an

**Or**gate without using an

**Or**gate. haha

We can solve this using the

**And**and

**Not**gates

*"We will*

**Not**the**And**."**4. Xor gate**- we can now use the Canonical Representation from page 9.

**5. Multiplexor (Mux)**- same as #4; use the Canonical Representation from page 9

**6. Demultiplexor (DMux)**- use truth table to determine when

*a*and

*b*will be 1; then use the Canonical Representation

**7 to 10. Multi-Bit gates (Not16, And16, Or16, Mux16)**- read

*"A.5.3 Busses"*of the Appendix to know more about how to solve these.

Do something like this, for example, for the Multibit Not gate:

Not(in=in[0], out=out[0]);

Not(in=in[1], out=out[1]);

...

Not(in=in[9], out=out[9]);

...

**11. Multi-Way Or (Or8Way)**- use

**Or**gates and

*internal pins*(see A.5.2 of Appendix A for an explanation for

*internal pins*)

**12 Multi-Way/Multi-Bit Multiplexor**

**12.a (Mux4Way16)**- use

**Mux16**and temporary internal pins

**12.b Mux8Way16**- similar to

**12.a**but also use

**Mux4Way16**

**13. Multi-Way/Multi-Bit Demultiplexor**- quite similar to

**12.a**and

**12.b**

**13.a DMux4Way -**Use

**DMux**and internal pins

**13.b DMux8Way**- same to

**13.b**but also use

**DMux4Way**

*If you have any comments or corrections or ideas on how to make the hints better, please tell me. Thanks!*

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